| Top |
| void | intel_mmio_use_pci_bar () |
| void | intel_mmio_unmap_pci_bar () |
| void | intel_mmio_use_dump_file () |
| void | intel_mmio_unmap_dump_file () |
| int | intel_register_access_init () |
| void | intel_register_access_fini () |
| uint32_t | intel_register_read () |
| void | intel_register_write () |
| int | intel_register_access_needs_fakewake () |
| uint32_t | intel_dpio_reg_read () |
| void | intel_dpio_reg_write () |
| uint32_t | intel_flisdsi_reg_read () |
| void | intel_flisdsi_reg_write () |
| uint32_t | intel_iosf_sb_read () |
| void | intel_iosf_sb_write () |
| int | intel_punit_read () |
| int | intel_punit_write () |
| int | intel_nc_read () |
| int | intel_nc_write () |
| extern void * | igt_global_mmio |
| struct | intel_register_range |
| struct | intel_register_map |
| struct | intel_mmio_data |
This library provides register I/O helpers in both a basic version and a more
fancy version which also handles forcewake and can optionally check registers
against a white-list. All register function are compatible. Hence the same
code can be used to decode registers with either of them, or also from a dump
file using intel_mmio_use_dump_file().
Furthermore this library also provides helper functions for accessing the various sideband interfaces found on Valleyview/Baytrail based platforms.
void intel_mmio_use_pci_bar (struct intel_mmio_data *mmio_data,struct pci_device *pci_dev);
Fill a mmio_data stucture with igt_mmio to point at the mmio bar.
pci_dev
can be obtained from intel_get_pci_device().
Users are expected to call intel_mmio_unmap_pci_bar() after use.
void
intel_mmio_unmap_pci_bar (struct intel_mmio_data *mmio_data);
Unmaps a PCI BAR region mmapped with intel_mmio_use_pci_bar()
void intel_mmio_use_dump_file (struct intel_mmio_data *mmio_data,char *file);
Sets also up mmio_data->igt_mmio to point at the data contained
in file
. This allows the same code to get reused for dumping and decoding
from running hardware as from register dumps.
Users are expected to call intel_mmio_unmap_dump_file() after use.
void
intel_mmio_unmap_dump_file (struct intel_mmio_data *mmio_data);
Unmaps a dump file mmapped with intel_mmio_use_dump_file()
int intel_register_access_init (struct intel_mmio_data *mmio_data,struct pci_device *pci_dev,int safe);
This initializes the new register access library, which supports forcewake handling and also allows register access to be checked with an explicit whitelist.
It also initializes mmio_data->igt_mmio like intel_mmio_use_pci_bar().
pci_dev
can be obtained from intel_get_pci_device().
Users are expected to call intel_register_access_fini() after use.
void
intel_register_access_fini (struct intel_mmio_data *mmio_data);
Clean up the register access helper initialized with
intel_register_access_init().
uint32_t intel_register_read (struct intel_mmio_data *mmio_data,uint32_t reg);
32-bit read of the register at offset
. This function only works when the new
register access helper is initialized with intel_register_access_init().
Compared to INREG() it can do optional checking with the register access
white lists.
void intel_register_write (struct intel_mmio_data *mmio_data,uint32_t reg,uint32_t val);
32-bit write to the register at offset
. This function only works when the new
register access helper is initialized with intel_register_access_init().
Compared to OUTREG() it can do optional checking with the register access
white lists.
int
intel_register_access_needs_fakewake (struct intel_mmio_data *mmio_data);
uint32_t intel_dpio_reg_read (struct intel_mmio_data *mmio_data,uint32_t reg,int phy);
32-bit read of the register at offset
through the DPIO sideband port.
void intel_dpio_reg_write (struct intel_mmio_data *mmio_data,uint32_t reg,uint32_t val,int phy);
32-bit write of the register at offset
through the DPIO sideband port.
uint32_t intel_flisdsi_reg_read (struct intel_mmio_data *mmio_data,uint32_t reg);
void intel_flisdsi_reg_write (struct intel_mmio_data *mmio_data,uint32_t reg,uint32_t val);
uint32_t intel_iosf_sb_read (struct intel_mmio_data *mmio_data,uint32_t port,uint32_t reg);
void intel_iosf_sb_write (struct intel_mmio_data *mmio_data,uint32_t port,uint32_t reg,uint32_t val);
int intel_punit_read (struct intel_mmio_data *mmio_data,uint32_t addr,uint32_t *val);
32-bit read of the register at offset
through the P-Unit sideband port.
int intel_punit_write (struct intel_mmio_data *mmio_data,uint32_t addr,uint32_t val);
32-bit write of the register at offset
through the P-Unit sideband port.
int intel_nc_read (struct intel_mmio_data *mmio_data,uint32_t addr,uint32_t *val);
32-bit read of the register at offset
through the NC sideband port.
int intel_nc_write (struct intel_mmio_data *mmio_data,uint32_t addr,uint32_t val);
32-bit write of the register at offset
through the NC sideband port.
extern void *igt_global_mmio;
Pointer to the register range, initialized using intel_register_access_init()
or intel_mmio_use_dump_file(). It is not recommended to use this directly.
This pointer is valid only for one drm device.
struct intel_register_range {
uint32_t base;
uint32_t size;
uint32_t flags;
};
struct intel_register_map {
struct intel_register_range *map;
uint32_t top;
uint32_t alignment_mask;
};